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TMS320C5515
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
www.ti.com
5.6
Direct Memory Access (DMA) Controller
The DMA controller is used to move data among internal memory, external memory, and peripherals
without intervention from the CPU and in the background of CPU operation.
The DSP includes a total of four DMA controllers. Aside from the DSP resources they can access, all four
DMA controllers are identical.
The DMA controller has the following features:
5.6.1
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Operation that is independent of the CPU.
Four channels, which allow the DMA controller to keep track of the context of four independent block
transfers.
Event synchronization. DMA transfers in each channel can be made dependent on the occurrence of
selected events.
An interrupt for each channel. Each channel can send an interrupt to the CPU on completion of the
programmed transfer.
Ping-Pong mode allows the DMA controller to keep track of double buffering context without CPU
intervention.
A dedicated clock idle domain. The four device DMA controllers can be put into a low-power state by
independently turning off their input clocks.
DMA Channel Synchronization Events
The DMA controllers allow activity in their channels to be synchronized to selected events. The DSP
supports 20 separate synchronization events and each channel can be tied to separate sync events
independent of the other channels. Synchronization events are selected by programming the CHnEVT
field in the DMAn channel event source registers (DMAnCESR1 and DMAnCESR2).
82
Peripheral Information and Electrical Specifications
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